C. Dorschky

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The integrated clock data recovery (CDR) circuit is a key element for broad band optical communication systems at 40 Gb/s. We report a 40Gb/s CDR fabricated in Indium-Phosphide heterojunction bipolar transistor (InP HBT) technology using the more robust architecture of a phase lock loop with a digital early-late phase detector. The faster (compared to SiGe)(More)
We have implemented a monolithic electronic 50 Gb/s 4:1 MUX core in an InP-based HBT technology. This rate is the fastest achieved in a monolithic 4:1 MUX to our knowledge, and is currently limited by the speed limitations of our pattern generation equipment. Our 2:1 MUX is too fast for characterization at present, but we present evidence that the speed of(More)
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