C. Chakrabarti

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— Battery lifetime enhancement is a critical design parameter for mobile computing devices. Maximizing the battery lifetime is a particularly difficult problem due to the non-linearity of the battery behavior and its dependence on the characteristics of the discharge profile. In this paper, we address the problem of task scheduling with voltage scaling in a(More)
| In this paper we present architectures and scheduling algorithms for encoders and decoders that are based on the 2-D Discrete Wavelet Transform. We consider the design of encoders and decoders individually, as well as in an integrated encoder-decoder system. We propose architec-tures ranging from SIMD processor arrays to folded archi-tectures that are(More)
This paper presents high sample rate semi-systolic array architectures for computing 1-D and 2-D non-recursive and recursive median lters. A high sample rate is obtained by pipelining the computations in each processor. While the non-recursive lters are pipelined by placing latches in the feed-forward paths, the recursive lters are restructured to create(More)
—Turbo codes have been chosen in the third generation cellular standard for high-throughput data communication. These codes achieve remarkably low bit error rates at the expense of high-computational complexity. Thus for hand held communication devices, designing energy efficient Turbo de-coders is of great importance. In this paper, we present a suite of(More)
This paper presents folded architectures and scheduling algorithms for computing the 2-D DWT for analysis and synthesis lters. The folded architectures consist of two parallel computation units (one for computations along the rows and the other for computations along the columns) and two storage units to store the intermediate outputs that are generated by(More)
Errors in MLC NAND Flash can be classified into retention errors and program interference (PI) errors. While retention errors are dominant when the data storage time is greater than 1 day, PI errors are dominant for short data storage times. Furthermore these two types of errors have different probabilities of 0->1 or 1->0 bit flips. We utilize the(More)
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