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- Peter A. Dinda, Thomas R. Gross, +5 authors Bwolen Yang
- 1994

The idea of exploiting both task and data parallelism in programs is appealing. However, identifying realistic, yet manageable example programs that can beneet from such a mix of task and data parallelism is a major problem for researchers. We address this problem by describing a suite of ve application from the domains of scientiic, signal, and image… (More)

- Bwolen Yang, Randal E. Bryant, +5 authors Fabio Somenzi
- FMCAD
- 1998

We present a study of the computational aspects of model checking based on binary decision diagrams (BDDs). By using a tracebased evaluation framework, we are able to generate realistic benchmarks and perform this evaluation collaboratively across several di erent BDD packages. This collaboration has resulted in signi cant performance improvements and in… (More)

- Jaspal Subhlok, Bwolen Yang
- PPOPP
- 1997

High Performance Fortran (HPF) has emerged as a standard language fordata parallel computing. However, a wide variety of scientific applications are best programmed by a combination of task and data parallelism. Therefore, a good model of task parallelism is important for continued success of HPF for parallel programming. This paper presents a task… (More)

- Bwolen Yang, Yirng-An Chen, Randal E. Bryant, David R. O'Hallaron
- ASP-DAC
- 1998

Binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. Efficient BDD construction techniques become more important as the complexity of protocol and circuit designs increases. This paper addresses this issue by introducing three techniques based on working set control. First, we introduce a novel BDD construction… (More)

- Bwolen Yang, David R. O'Hallaron
- PPOPP
- 1997

With the increasing complexity of protocol and circuit designs, formal verification has become an important research area and binary decision diagrams (BDDs) have been shown to be a powerful tool in formal verification. This paper presents a parallel algorithm for BDD construction targeted at shared memory multiprocessors and distributed shared memory… (More)

Static property checking is a technique for verifying some pre-defined design rules such as "bus contention", "racing condition", and "don't-care case". It contains formal verification engines so that a property can be completely verified and if the property is proven false, a counterexample will be generated for debugging the design. Among the different… (More)

Many computations perform operations that match this pattern: rst, a loop iterates over an input array, producing an array of (partial) results. The loop iterations are independent of each other and can be done in parallel. Second, a reduction operation combines the elements of the partial result array to produce the single nal result. We call these two… (More)

This paper presents optimizations for verifying systems with complex time-invariant constraints. These constraints arise naturally from modeling physical systems, e.g., in establishing the relationship between different components in a system. To verify constraint-rich systems, we propose two new optimizations. The first optimization is a simple, yet… (More)

This paper presents the technique of operator sifting as a new way of understanding both breadth-first and depth-first approaches to BDD construction. A new algorithm is also proposed to capture the breadth-first approach’s advantage of memory access locality, while keeping the depth-first approach’s advantage of low memory overhead. Our preliminary… (More)

Symbolic model checking has been successfully applied in verification of various finite state systems, ranging from hardware circuits to software protocols. A core technology underlying this success is the Binary Decision Diagram (BDD) representation. Given the importance of BDDs in model checking, it is surprising that there has been little or no work on… (More)