Bruce K. Holmer

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Most Prolog machines have been based on specialized architectures. Our goal is to start with a general purpose architecture and determine a minimal set of extensions for high performance Prolog execution. We have developed both the architecture and optimizing compiler simultaneously, drawing on results of previous implementations. We find that most Prolog(More)
In this papec we propose a domain decomposition scheme that seeks to minimize totalparallel execution time by considering the relative importance of two competing concerns-balancing the load and minimizing communication for a particular application and architecture. A simulated annealing approach is used to optimize an objective function with components(More)
This paper presents a systematic technique for generating new instructiat sets which are optimizedfor a given mi-croanchitecture and set of benchmark programs. This process consists of the following steps: generation of execution traces, formation of code segments, optimal recompilation of the co& segments to produce candidate instructions, and covering of(More)
Parity-declustered data layouts were developed to reduce the time for on-line failure recovery in disk arrays. They generally require perfect balancing of reconstruction workload among the disks; this restrictive balance condition makes such data layouts diicult to construct. In this paper, we consider approximately balanced data layouts, where some(More)
Domain decomposition is an important step for parallel scientiic applications, in particular nite element analyses. A good decomposition will minimize both the time spent on local computation and on interprocessor communication. It is often the case that these two goals cannot be satissed simultaneously. In this paper, we use analytical and experimental(More)
The HP-PA instruction set allows any arithmetic instruction to conditionally skip the following instruction based on the result of the arithmetic calculation. We have isolated this architectural feature and measured its performance benefit on a set of SPEC benchmark programs. Results indicate that adding the ability to skip to arithmetic instructions yields(More)
Most Prolog machines have been based on specialized architectures. Our goal is to start with a general purpose architecture and determine a minimal set of extensions for high performance Prolog execution. We have developed both the architecture and optimizing compiler simultaneously, drawing on results of previous implementations. We nd that most Prolog(More)
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