Brian W. Curran

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ions of the global environment are brought down to the macro level to guide macro-level implementation. Shadow This is a representation of the global wires overlaying a macro that is used to guide macro physical design and for macro extraction. Timing assertions This is information on the global timing at macro interfaces-arrival times with phase tags on(More)
The IBM POWER6e microprocessor is a high-frequency (.5-GHz) microprocessor fabricated in the IBM 65-nm silicon-oninsulator (SOI) complementary metal-oxide semiconductor (CMOS) process technology. This paper describes the circuit, physical design, clocking, timing, power, and hardware characterization challenges faced in the pursuit of this industryleading(More)
A microprocessor implementing IBM S/390 architecture operates in a 10 + 2 way system at frequencies up to 411 MHz (2.43 ns). The chip is fabricated in a 0.2m Le CMOS technology with five layers of metal and tungsten local interconnect. The chip size is 17.35 mm 17.30 mm with about 7.8 million transistors. The power supply is 2.5 V and measured power(More)