Brian S Cheng

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Coastal ecosystems are among the most human-impacted habitats globally, and their management is often critically linked to recovery of declining native species. In the San Francisco Estuary, the Delta Smelt (Hypomesus transpacificus) is an endemic, endangered fish strongly tied to Californian conservation planning. The complex life history of Delta Smelt(More)
Keywords: Statistical variability Trapped charge Thin-body devices Random discrete dopant Line edge roughness a b s t r a c t The quantitative evaluation of the impact of key sources of static and dynamic statistical variability (SV) are presented for LSTP nMOSFETs corresponding to 32 nm and 22 nm technology generation transistors with thin-body (TB) SOI(More)
Introduction Increasing CMOS device variability has become one of the most acute problems facing the semiconductor manufacturing and design industries at, and beyond, the 45 nm technology generation. Most problematic of all is the statistical variability introduced by the discreteness of charge and granularity of matter in transistors with features already(More)
—We present measurements for the standard deviation of the threshold voltage in n-and p-channel MOSFETs from the 45-nm low-power platform of STMicroelectronics. The measurements are compared with 3-D statistical simulations carried out with the Glasgow " atomistic " device simulator, considering random discrete dopants, line edge roughness, and the(More)
Biotic resistance is the ability of native communities to repel the establishment of invasive species. Predation by native species may confer biotic resistance to communities, but the environmental context under which this form of biotic resistance occurs is not well understood. We evaluated several factors that influence the distribution of invasive Asian(More)
Novel device architectures such as ultra-thin body silicon-on-insulator (UTB SOI) MOSFETs which are more resistant to some of the sources of intrinsic parameter fluctuations are expected to play an increasingly important role beyond the 45 nm technology node. Apart from reduced device variability UTB SOI SRAM would benefit considerably from the superior(More)
Ultra Thin Body (UTB) SOI MOSFETs are increasingly competitive for nanometre scale VLSI applications due to superior electrostatic integrity compared to conventional MOSFETs. The possibility to use undoped channels in such devices also dramatically reduces the random dopant induced parameter fluctuations. To fully realise performance benefits of UTB SOI(More)
² The TRAMS (Terascale Reliable Adaptive MEMORY Systems) project addresses in an evolutionary way the ultimate CMOS scaling technologies and paves the way for revolutionary, most promising beyond-CMOS technologies. In this abstract we show the significant variability levels of future 18 and 13nm device bulk-CMOS technologies as well as its dramatic effect(More)
Intrinsic parameter fluctuations steadily increase with CMOS technology scaling. Around the 65 nm technology node, such fluctuations will eliminate much of the available noise margin in SRAM based on conventional MOSFETs. Device mismatch due to intrinsic parameter fluctuation causes each memory cell of the millions in a typical memory array to have(More)