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—A wireless interconnect system which transmits and receives RF signals across a chip using integrated antennas, receivers, and transmitters is proposed and demonstrated. The transmitter consists of a voltage-controlled oscillator, an output amplifier, and an antenna, while the receiver consists of an antenna, a low-noise amplifier, a frequency divider, and(More)
—A phased-array transmitter (TX) for multi-Gb/s non-line-of-sight links in the four frequency channels of the IEEE 802.15.3c standard (58.32 to 64.8 GHz) is fully integrated in a 0.12-m SiGe BiCMOS process. It consists of an up-conversion core followed by a 1:16 power distribution tree, 16 phase-shifting front-ends, and a digital control unit. The TX core(More)
— A feature-rich second-generation 60-GHz transceiver chipset is introduced. It integrates dual-conversion superheterodyne receiver and transmitter chains, a sub-integer frequency synthesizer, full programmability from a digital interface, modulator and demodulator circuits to support analog modulations (e.g. MSK, BPSK), as well as a universal I&Q interface(More)
—A generalized architecture and theory for realizing multimodulus, sub-integer frequency division is developed by extending the phase-switched divider technique. The sub-integer divider consists of a pre-scaler, a phase rotator, a post-scaler, and a modulus controller. Phase rotation is proposed as an effective technique to realize fine phase resolution and(More)
The feasibility of integrating antennas and required circuits to form wireless interconnects in foundry digital CMOS technologies has been demonstrated. The key challenges including the effects of metal structures associated with integrated circuits, heat removal, packaging, and interaction of transmitted and received signals with nearby circuits appear to(More)