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- Florent de Dinechin, Bogdan Pasca
- IEEE Design & Test of Computers
- 2011

- Sebastian Banescu, Florent de Dinechin, Bogdan Pasca, Radu Tudoran
- SIGARCH Computer Architecture News
- 2010

The implementation of high-precision floating-point applications on reconfigurable hardware requires large multipliers. Full multipliers are the core of floating-point multipliers. Truncated multipliers, trading resources for a well-controlled accuracy degradation, are useful building blocks in situations where a full multiplier is not needed.
This work… (More)

- Florent de Dinechin, Bogdan Pasca
- 2009 International Conference on Field…
- 2009

Recent computing-oriented FPGAs feature DSP blocks including small embedded multipliers. A large integer multiplier, for instance for a double-precision floating-point multiplier, consumes many of these DSP blocks. This article studies three non-standard implementation techniques of large multipliers: the Karatsuba-Ofman algorithm, non-standard multiplier… (More)

- Florent de Dinechin, Cristian Klein, Bogdan Pasca
- 2009 International Conference on Field…
- 2009

Custom operators, working at custom precisions, are a key ingredient to fully exploit the FPGA flexibility advantage for high-performance computing. Unfortunately, such operators are costly to design, and application designers tend to rely on less efficient off-the-shelf operators. To address this issue, an open-source architecture generator framework is… (More)

This article studies two common situations where the flexibility of FPGAs allows one to design applicationspecific floating-point operators which are more efficient and more accurate than those offered by processors and GPUs. First, for applications involving the addition of a large number of floating-point values, an ad-hoc accumulator is proposed. By… (More)

- Florent de Dinechin, Mioara Joldes, Bogdan Pasca
- ASAP
- 2010

Many applications require the evaluation of some function through polynomial approximation. This article details an architecture generator for this class of problems that improves upon the literature in two aspects. Firstly, it benefits from recent advances related to constrained-coefficient polynomial approximation. Secondly, it refines the error analysis… (More)

- Bogdan Pasca
- 22nd International Conference on Field…
- 2012

Floating-point division is a very costly operation in FPGA designs. High-frequency implementations of the classic digit-recurrence algorithms for division have long latencies (of the order of the number fraction bits) and consume large amounts of logic. Additionally, these implementations require important routing resources, making timing closure difficult… (More)

Solving the Table Maker’s Dilemma, for a given function and a given target floating-point format, requires testing the value of the function, with high precision, at a very large number of consecutive values. We give an algorithm that allows for performing such computations on a very regular architecture, and present an FPGA implementation of that… (More)

- Florent de Dinechin, Bogdan Pasca
- FPT
- 2010

This article presents a generator of floating-point exponential operators targeting recent FPGAs with embedded memories and DSP blocks. A single-precision operator consumes just one DSP block, 18Kbits of dual-port memory, and 392 slices on Virtex-4. For larger precisions, a generic approach based on polynomial approximation is used and proves more… (More)

- Florent de Dinechin, Hong Diep Nguyen, Bogdan Pasca
- 2010 International Conference on Field…
- 2010

Integer addition is a universal building block, and applications such as quad-precision floating-point or elliptic curve cryptography now demand precisions well beyond 64 bits. This study explores the trade-offs between size, latency and frequency for pipelined large-precision adders on FPGA. It compares three pipelined adder architectures: the classical… (More)