Blazej Nowakowski

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This paper presents an original testing board dedicated for SI ASIC chips. The board is based on a programmable logic device, which generates the required signals for the tested chip. The parameters of the signals are set with a simple interface. The project was written in a VHDL and implemented in Xilinx CPLD. The board was used to test a new structure of(More)
This work presents the architecture of communication interface between nodes of dedicated cluster (custom computing machine) for electromagnetic field computations by finite elements method. The communication channel is based on LVDS (low voltage differential signaling) standard. Basics modules of transmitter/receiver units are also discussed. In addition(More)
This paper presents prototype board and its operating system dedicated for application specific parallel processing. The proposed architecture consists of two AVR microprocessors, FPGA Spartan3, SRAM and flash EEPROM memories, DA converters, and several serial communication ports. To make the system "designer friendly" a supervising algorithm, which can be(More)
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