Bernhard Rohfleisch

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Due to the increasing demand for low power circuits, low power dissipation has emerged as an important optimization goal in logic synthesis. In this paper, we show that the power dissipation of technology mapped circuits can be significantly reduced by ATPG-based structural transformations. Our approach performs a sequence of permissible signal(More)
In this paper, we present a new approach that performs timing driven placement for standard cell circuits in interaction with netlist transformations. As netlist transformations are integrated into the placement process, an accurate net delay model is available. This model provides the basis for e ective netlist transformations. In contrast to previous(More)
System-level power analysis is commonly used in modern SoC design processes to evaluate power consumption at early design phases. With the increasing variations in manufacturing, the statistical characteristics of parameters are also incorporated in the state-of-the-art methods. However, the spatial correlation between modules still remains as a challenge(More)
Dwcription: The term system-on-sficon has been used to denote the integration of random logic, processor cores, SRAMS, ROMs, and analog components on the same die. But up to recently, one major component had been missing: high-density DRAMs. Today’s technologies allow the integration of sigtilcant amounts of DW memory for applications such as data buffetig,(More)
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