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The following article describes an easy to implement but very powerful extension to simple conditional execution based program flow control as used for example in the ARM RISC processors and others.
This article describes a very simple but quite powerful 32-bit architecture ideally suited for experimental and educational purposes in computer architecture design. It employs a very orthogonal instruction set in conjunction with 16 general purpose registers and a simple interrupt capability. It was developed at the University of Mainz, Germany and a… (More)
The architecture described in the following articel is a direct successor of &micro;-EP-1 (cf. ) and was developed by the author and Robert Linden (Universit&auml;t Bonn, FB Informatik). NICE is a 32-bit processor, utilizing a fixed instruction format, a register set of sixteen general purpose registers and sat extremely powerful but simple and… (More)