Bernd Scheuermann

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We present a hardware implementation of population-based ant colony optimization (P-ACO) on field-programmable gate arrays (FPGAs). The ant colony optimization meta-heuristic is adopted from the natural foraging behavior of real ants and has been used to find good solutions to a wide spectrum of combinatorial optimization problems. We describe the P-ACO(More)
A new kind of Ant Colony Optimization (ACO) algorithm is proposed that is suitable for an implementation in hardware. The new algorithm — called Counter-based ACO — allows to systolically pipe artificial ants through a grid of processing cells. Various features of this algorithm have been designed so that it can be mapped easily to Field-Programmable Gate(More)
We propose to modify a type of ant algorithm called Population based Ant Colony Optimization (P-ACO) to allow implementation on an FPGA architecture. Ant algorithms are adapted from the natural behavior of ants and used to find good solutions to combinatorial optimization problems. General layout on the FPGA and algorithmic description are covered. The most(More)
XtreemOS aims to build and promote a Linux based operating system to provide native Virtual Organization (VO) support in the next generation Grids. XtreemOS takes a different approach from many existing Grid middleware by: first, recognizing the fundamental role of VO in Grid computing and hence taking VO support into account from the very beginning of our(More)
In this paper we present S-Net, a coordination language based on dataflow principles, intended for design of concurrent software. The language is introduced and then used for programming a concurrent solver for a combinatorial optimisation problem. We present the analysis and tracing facilities of our S-Netruntime system and show how these aid programmers(More)
This paper introduces the ADVANCE approach to engineering concurrent systems using a new component-based approach. A cost-directed tool-chain maps concurrent programs onto emerging hardware architectures, where costs are expressed in terms of programmer annotations for the throughput, latency and jit-ter of components. These are then synthesized using(More)
This paper proposes a design of a database system which accelerates the execution of database transactions by offloading database operators (e.g. joins, scans and sorting) in hardware algorithms executed on runtime reconfigurable computing platforms. Furthermore, a hybrid database system is described which exploits the strengths of the new reconfigurable(More)