Berkehan Ciftcioglu

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We demonstrate a micrometer-scale electro-optic modulator operating at 2.5 Gbps and 10 dB extinction ratio that is fabricated entirely from deposited silicon. The polycrystalline silicon material exhibits properties that simultaneously enable high quality factor optical resonators and sub-nanosecond electrical carrier injection. We use an embedded p + n-n +(More)
— We propose a new GHz clock distribution scheme, injection-locked clocking (ILC). This new scheme uses injection-locked oscillators as the local clock regenerators. It can achieve better power efficiency and jitter performance than conventional buffered trees with the additional benefit of built-in deskewing. A test chip is implemented in a standard 0.18m(More)
— Injection-locked clocking (ILC) has been proposed [1] to improve the skew and jitter performance while reducing the power consumption in multi-gigahertz clock distribution networks. This paper presents a new design of the injection-locked oscillator (ILO) suitable for ILC applications. It uses a transformer to generate differential signals and then(More)
Continued device scaling enables microprocessors and other systems-on-chip (SoCs) to increase their performance, functionality, and hence, complexity. Simultaneously, relentless scaling, if uncompensated, degrades the performance and signal integrity of on-chip metal interconnects. These systems have therefore become increasingly communications-limited. The(More)
[11] A. Stroele, " BIST patter generators using addition and subtraction operations , " J. A concurrent built-in self-test architecture based on a self-testing RAM, " IEEE Trans. An on-chip march pattern generator for testing embedded memory cores, " IEEE Trans. Diagnostic data compression techniques for embedded memories with built-in self-test, " J.(More)
We report 50 Gbit/s modulation capability using four silicon micro ring modulators within a footprint of 500 µm 2. This is the highest total modulation capability shown in silicon using compact micro-ring modulators. Using the proposed techniques, silicon nanophotonic bandwidths can meet the requirements of future CMOS interconnects by using multiple(More)
A key device in future high speed short reach interconnect technology will be the optical modulator. These devices, in silicon, have experienced dramatic improvements over the last 6 years and the modulation bandwidth has increased from a few tens of MHz to over 30 GHz. However, the demands of optical interconnects are significant. Here we describe an(More)
—A new PIN photodiode (PD) structure with deep n-well (DNW) fabricated in an epitaxial substrate complementary metal–oxide–semiconductor (epi-CMOS) process is presented. The DNW buried inside the epitaxial layer intensifies the electric field deep inside the epi-layer significantly, and helps the electrons generated inside the epi-layer to drift faster to(More)
—We present a seamless integration of spin-based memory and logic circuits. The building blocks are magnetologic gates based on a hybrid graphene/ferromagnet material system. We use network search engines as a technology demonstration vehicle and simulate a high-speed, small-area, and low-power spin-based circuit. T HE CONTINUED Moore's law scaling in CMOS(More)
This paper presents the first chip-scale demonstration of an intra-chip free-space optical interconnect (FSOI) we recently proposed. This interconnect system provides point-to-point free-space optical links between any two communication nodes, and hence constructs an all-to-all intra-chip communication fabric, which can be extended for inter-chip(More)