Benoit Miramond

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Recent FPGAs allow the design of efficient and complex <i>Heterogeneous Systems-on-Chip</i> (HSoC). Namely, these systems are composed of several processors, hardware accelerators as well as communication media between all these components. Performances provided by HSoCs make them really interesting for data-flow applications, especially image processing(More)
This paper presents a method to virtualize the communications into a distributed heterogeneous embedded Multiprocessor System-on-Chip (MPSoC) platform containing reconfigurable hardware computing units. We propose a new concept of middleware, implemented in software and in hardware to provide the designer a single programming interface. The middleware(More)
By incorporating reconfigurable hardware in embedded system architectures it has become easier to satisfy the performance constraints of demanding applications while lowering system cost. In order to evaluate the performance of a candidate architecture, the nodes (tasks) of the data flow graphs that describe an application must be assigned to the computing(More)
We are interested in the design of a system-on-chip implementing the vision system of a mobile robot. Following a biologically inspired approach, this vision architecture belongs to a larger sensorimotor loop. This regulation loop both creates and exploits dynamics properties to achieve a wide variety of target tracking and navigation objectives. Such a(More)
A recent trend in several robotics tasks is to consider vision as the primary sense to perceive the environment or to interact with humans. Therefore, vision processing becomes a central and challenging matter for the design of real-time control architectures. We follow in this paper a biological inspiration to propose a real-time and embedded control(More)
This paper addresses the problem of image processing algorithms implementation onto dynamically and reconfigurable architectures. Today, these Systems-on-Chip (SoC), offer the possibility to implement several heterogeneous processing elements in a single chip. It means several processors, few hardware accelerators as well as communication mediums between(More)
This paper describes a bio-inspired architectural approach to design highly adaptive and reconfigurable systems in the context of mobile robotics. The aim is to design the hardware architecture of an intelligent controller for a robot that exhibits several behaviors such as landscape learning, obstacle avoidance, path planning, sensory-motor control. The(More)
System level modeling has been adopted for few years as a way to face the growing design complexity of embedded systems. In this systems the control of embedded applications is more and more often devoted to a Real-Time Operating System (RTOS). This RTOS can either be deployed in software or hardware, partially or completely, depending on the non-functional(More)