Benoit Miramond

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By incorporating reconfigurable hardware in embedded system architectures it has become easier to satisfy the performance constraints of demanding applications while lowering system cost. In order to evaluate the performance of a candidate architecture, the nodes (tasks) of the data flow graphs that describe an application must be assigned to the computing(More)
—This paper addresses the problem of image processing algorithms implementation onto dynamically and reconfig-urable architectures. Today, these Systems-on-Chip (SoC), offer the possibility to implement several heterogeneous processing elements in a single chip. It means several processors, few hardware accelerators as well as communication mediums between(More)
—The advent of massively parallel many-core archi-tectures on a chip can be considered as a good opportunity to rethink the classical computation model used for several decades and that now shows some limitations to follow both the potential and the usage of new technologies. In this paper, the way explored to study new solutions is directly inspired from(More)
—This paper presents a method to virtualize the communications into a distributed heterogeneous embedded Multiprocessor Systems-on-Chip (MPSoC) platform containing reconfigurable hardware computing units. We propose a new concept of middleware, implemented in software and in hardware to provide the designer a single programming interface. The middleware(More)