Benjamin Egg

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This paper describes the architecture, design flow and verification process for the FPGA implementation of timing recovery circuits for QAM waveforms. We achieve sample timing alignment by phase selection of a polyphase matched filter. The challenge in realizing these circuits in hardware is not in the construction of the multirate filter architecture, but(More)
The FFT is an important core to which we couple an M-path partitioned filter and commutator to build high performance spectrum analyzers and channelized transmitters and receivers. With slight modifications of the system the channelizer and spectrum analyzer can perform secondary processing tasks such as arbitrary sample rate changes. Output sample rates(More)
The FFT, the efficient algorithm for implementing the DFT, enjoys great acceptance as the signal processing tool for spectrum analysis, for channelized receivers, and for fast convolution. In the first applications, spectrum analysis, the FFT is supported by a set of weights, the window, applied to data multiplicatively. In the second application the FFT is(More)
There are signal processing scenarios for which a narrowband signal, such as a pilot tone, is to be extracted from a wide bandwidth signal while preserving the sample rate of the wideband signal. A FIR filter that extracts this signal has many taps due to the large ratio of sample rate to the filter's transition bandwidth. We significantly reduce the(More)
Modern Unmanned Aerial Vehicles (UAVs) have the capability of carrying sensors that produce large amounts of data. A high speed wireless data link is required to transfer this data to other systems for processing. This paper presents an FPGA-based implementation of a high data-rate (350 Mbps) QPSK modulator and demodulator to support a high data rate relay(More)
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