Beihua Ying

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In this paper, we propose an energy efficient architecture of wireless sensor network node. It consists of a general-purpose processor and several compression accelerators. To verify the low energy consumption of this architecture, we implement a baseband chip of sensor node by 1-poly 6-metal 0.18um CMOS technology, in which a hardware accelerator is(More)
Energy is an important consideration in wireless sensor networks. In the current compression evaluations, traditional indices are still used, while energy efficiency is probably neglected. Moreover, various evaluation biases significantly affect the final results. All these factors lead to a subjective evaluation. In this paper, a new criterion is proposed(More)
SUMMARY This paper proposed a novel platform for sensor nodes to resolve the energy and latency challenges. It consists of a processor, an adaptive compressing module and several compression accelerators. We completed the proposed chip in a 0.18 µm HJTC CMOS technology. Compared to the software-based solution, the hardware-assisted compression reduces over(More)
Avhandling som med tillstånd av Kungliga Tekniska Högskolan framläggs till offentlig granskning för avläggande av teknologie doktorsexamen torsdagen den 10 juni kl. Abstract Spatial information presented visually is not easily accessible to visually impaired users. Current technologies, such as screen readers, cannot intuitively convey spatial layout or(More)
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