Behzad Zeinali

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In this paper, we present a digital background calibration technique for pipelined analog-to-digital converters (ADCs). In this scheme, the capacitor mismatch, residue gain error, and amplifier nonlinearity are measured and then corrected in digital domain. It is based on the error estimation with nonprecision calibration signals in foreground mode, and an(More)
In this paper, we propose a new sub-threshold 9T-Static Random Access Memory (SRAM) cell in 14 nm Fin FET technology by which the access time of the memory cell is improved by at least 30 percent compared to the standard 8T-SRAM cell. Furthermore, the leakage current of the proposed SRAM cell is reduced by an assisting circuit. Simulation results show that(More)
With the fast progress in miniaturization of sensors and advances in micromachinery systems, a gate has been opened to the researchers to develop extremely small wearable/implantable microsystems for different applications. However, these devices are reaching not to a physical limit but a power limit, which is a critical limit for further miniaturization to(More)
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