Balkaran S. Gill

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In this paper we propose a new Built in Current Sensor (BICS) to detect single event upsets in SRAM. The BICS is designed and validated for 100nm process technology. The BICS reliability analysis for process, voltage, temperature, and power supply noise are provided. This BICS detect various shapes of current pulses generated due to particle strike. The(More)
Test chips built in a 32nm bulk CMOS technology consisting of hardened and non-hardened sequential elements have been exposed to neutrons, protons, alpha-particles and heavy ions. The radiation robustness of two types of circuit-level soft error mitigation techniques has been tested: 1) SEUT (Single Event Upset Tolerant), an interlocked, redundant state(More)
Soft errors in semiconductor memories occur due to charged particle strikes at the cell nodes. In this paper, we present a new asymmetric memory cell to increase the soft error tolerance of SRAM. At the same time, this cell can be used at the reduced supply voltage to decrease the leakage power without significantly increasing the soft error rate of SRAM. A(More)
In this paper, we introduce an approach for computing soft error susceptibility of nodes in large CMOS circuits at the transistor level. The node sensitivity depends on the electrical, logic, and timing masking. An efficient technique is developed to compute the electrical masking of nodes from the characterization tables and the inverse pulse propagation.(More)
A novel circuit-level simulation strategy to assess the impact of charge sharing on the upset rate of redundancy based radiation hardened designs is introduced. Accelerated measurements conducted at the Los Alamos National Laboratory show a 10s or better reliability of hardened latches over standard latches for 45nm and 90nm implementations. Despite this(More)
In this paper, we present an analysis methodology to compute circuit node sensitivity due to charged particle induced delay (timing) errors, soft delay errors (SDE). We define node sensitivity metric and describe a step by step procedure to compute node sensitivity. We use mixed-mode simulations to extract accurate current pulses for the characterization of(More)
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