Learn More
—A novel logic family, called charge recycling differential logic (CRDL), has been proposed and analyzed. CRDL reduces power consumption by utilizing a charge recycling technique with the speed comparable to those of conventional dynamic logic circuits. It has an additional benefit of improved noise margin due to inherently static operation. The noise(More)
Blind-oversampling adaptive oversample-level decision feedback-equalized (DFE) receiver is presented for use in global on-chip serial links. The blind oversampling is adopted to avoid receiver synchronization for reliable channel data reception, and the adaptive oversample-level DFE is used to reduce data-dependent jitter and ease oversampling data recovery(More)