• Publications
  • Influence
A two-stage model for negative bias temperature instability
Based on the established properties of the most commonly observed defect in amorphous oxides, the E′ center, we suggest a coupled two-stage model to explain the negative bias temperature instability.Expand
  • 188
  • 26
  • PDF
The Paradigm Shift in Understanding the Bias Temperature Instability: From Reaction–Diffusion to Switching Oxide Traps
One of the most important degradation modes in CMOS technologies, the bias temperature instability (BTI) has been known since the 1960s. Already in early interpretations, charge trapping in the oxideExpand
  • 347
  • 21
  • PDF
The time dependent defect spectroscopy (TDDS) for the characterization of the bias temperature instability
We introduce a new method to analyze the statistical properties of the defects responsible for the ubiquitous recovery behavior following negative bias temperature stress, which we term timeExpand
  • 245
  • 19
  • PDF
Origin of NBTI variability in deeply scaled pFETs
The similarity between Random Telegraph Noise and Negative Bias Temperature Instability (NBTI) relaxation is further demonstrated by the observation of exponentially-distributed threshold voltageExpand
  • 265
  • 17
  • PDF
Disorder-controlled-kinetics model for negative bias temperature instability and its experimental verification
A model for NBTI is proposed based on disorder-controlled diffusion and drift in amorphous dielectrics. Experimental data on finFETs confirm all major predictions of the model: temperature dependenceExpand
  • 164
  • 17
Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability
The influence of FET gate oxide breakdown on the performance of a ring oscillator circuit is studied using statistical tools, emission microscopy, and circuit analysis. It is demonstrated that manyExpand
  • 260
  • 11
Ubiquitous relaxation in BTI stressing—New evaluation and insights
The ubiquity of threshold voltage relaxation is demonstrated in samples with both conventional and high-k dielectrics following various stress conditions. A technique based on recording short tracesExpand
  • 190
  • 11
  • PDF
Emerging Yield and Reliability Challenges in Nanometer CMOS Technologies
With further scaling of nanometer CMOS technologies, yield and reliability become an increasing challenge. This paper reviews the most important phenomena affecting yield and reliability. For eachExpand
  • 125
  • 10
  • PDF
Analytic modeling of the bias temperature instability using capture/emission time maps
Despite a number of recent advances made in the understanding of the bias temperature instability (BTI), there is still no simple model available which can capture BTI degradation during DC orExpand
  • 142
  • 9
  • PDF
AC NBTI studied in the 1 Hz -- 2 GHz range on dedicated on-chip CMOS circuits
We describe on-chip circuits specially designed and fabricated for the purpose of measuring the effect of AC NBTI on an individual, well-defined device in the wide frequency range on a single wafer.Expand
  • 142
  • 9