B. Robert Gregoire

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Finite opamp gain and output swing are two limitations for precision analog circuits. These limitations are especially serious at lower supply voltages where limited headroom prevents the use of cascode devices to improve gain. The magnitude of the problem is illustrated in Fig. 30.1.1 for a 2-stage opamp in a 0.18µm process. When each leg is biased at 1mA,(More)
—this paper introduces series/parallel and parallel/series composite resistor topologies. These topologies allow one to design a temperature coefficient that is insensitive to process variations, unlike the traditional simple series and simple parallel composite resistors. Formulas and normalized circuits are provided. Four zero-temperature coefficient(More)
—A switched-capacitor bias that provides a constant – characteristic over process and temperature variation is presented. The bias can be adapted for use with subthreshold circuits, or circuits in strong inversion. It uses eight transistors, five switches, and three capacitors, and performs with supply voltages less than 0.9 V. Theoretical output current is(More)
A new correlated double sampling technique that avoids the additional thermal noise penalty is presented. The new technique employs a low-gain two-stage opamp with the second stage made up of multiple gain stages in parallel. The superior noise performance of the proposed technique to correlated double sampling is shown. Introduction: In a switch-capacitor(More)
  • B.R. Gregoire
  • 2004
Circuit performance parameters such as offsets or common mode rejection ratio are limited by the matching of the individual elements. A technique is presented that allows one to determine the minimum total active area required to meet a specification limited by mismatch. Furthermore, the technique can be used to determine the optimum allocation of the(More)
A CMOS switched capacitor charge pump power supply regulation circuit that combines the reference and regulation blocks into a single block is presented. The switched capacitor topology uses a single PN junction and allows for inputs and outputs less than 1V. The topology was fabricated in Ail Semiconductor's 0.5 mum C5 process and was used to create a 3.2V(More)
—This paper shows how the relative size of components can be used to increase matching performance – saving orders of magnitude in component area. The relative size information can be found by ordering the elements from smallest to largest. A circuit to do this is described. Properties of ordered devices are summarized. Improvements are quantified for(More)
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