Axel Siebenborn

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This paper presents a novel approach for multiprocess synthesis supporting well-tailored module integration at system level. The goal is to extend the local scope of existing architectural synthesis approaches in order to apply global optimization techniques across process bounds for shared system resources (e.g. memories, busses, global ALUs) during(More)
In this paper we present a method to perform static timing analysis of SystemC models, that describe parallel, communicating software processes. The paper combines a worst-case execution time (WCET) analysis with an analysis of the communication behavior. The communication analysis allows the detection of points, where the program flow of two or more(More)
In this paper we present an approach for analysis of systems of parallel, communicating processes for SoC design. We present a method to detect communications that synchronize the program flow of two or more processes. These synchronization points set the processes into relation and allow the determination of the global timing behavior of such a system.(More)
In this paper we present an approach for the analysis of systems of parallel communicating processes, with regard to Network-on-Chip applications. We present a method to detect communications that synchronize the program flow of two or more processes. These synchronization points set the processes into relation and allow the determination of the global(More)
In this paper, we present an approach for control-flow aware communication and conflict analysis of systems of parallel communicating processes. This approach allows to determine the global timing behavior of such a system and to detect communication that might produce conflicts on shared communication resources. Furthermore, we show the incorporation of(More)
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