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ACKNOWLEDGMENTS I would like to gratefully acknowledge Dr. Bülent Sankur for the invaluable intellectual leadership he unfailingly provided in all stages of this thesis and his constant patience. I would like to acknowledge the support of TÜBİTAK Marmara Research Center and my colleagues/friends at MRC. I would like to thank Dr. Bilge Günsel for the(More)
iii ACKNOWLEDGEMENTS I would like to express my sincere gratitude to my thesis supervisor, Prof. Avni Morgül for his invaluable guidance, patience, motivation, advice and contributions throughout this study. His guidance helped me in all the time of research and writing of this thesis. It was really a pleasure for me to work with him. I would like to thank(More)
The multi-valued logic circuits provide very small chip size, higher speed, and a small number of interconnections. However, the main drawback of these circuits is the lower noise margin and it is necessary to restore the nominal levels of the signal after a certain number of cascaded stages. A new current-mode CMOS restoration circuit is presented and(More)
A higher-radix algebra for full-addition of two numbers is described and realised by combining multivalued logic min, max, literal and cyclic operators in terms disjoint terms. The latter operator is designed by using a current-mode threshold circuit while the other operator is realised by only voltage-mode switching circuits. The threshold circuit employed(More)
— Adder trees are the crucial design blocks of many arithmetic VLSI circuits. Alternative implementations can solve the large area requirements and complicated interconnection scheme of these building blocks. Multiple Valued Logic (MVL) implementation of an adder tree can be an alternative design style, which can save from area and interconnect. I.(More)