Avisek Sen

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260 Abstract— Low power Configuration Logic Block (CLB) for FPGA is highly desirable in VLSI circuit and system. The CLB is the main block of any FPGA architecture. Each CLB block consists of three static LUT's for implementing NCL logic function. 27 fundamental NCL logic gates are implemented in each LUT. The proposed CLB has 10 inputs and 3 different(More)
The multiplication operation is used in many parts of a digital system or digital computer, usually in signal processing, video/graphics and scientific computation. With advances in technology, various techniques have been developed to design multipliers, which offer high speed, low power consumption and lesser area. Thus making them suitable for various(More)
The objective of congestion management is to take actions or control measures in order to avoid line overloading of transmission networks. A restructuring based congestion management technique has been proposed in this paper. Proposed methodology can ensure an appropriate level of voltage stability enhancement of network. Minimization of system power losses(More)
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