Atsuki Inoue

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  • Atsuki Inoue
  • 16th Asia and South Pacific Design Automation…
  • 2011
A supply voltage control technique for realizing low power LSI is utilized not only for general purpose processors, but also for custom ASIC thanks to advanced LSI design environments. Fine grain supply voltage control in time domain in power gating and DVFS scheme are seen as promising techniques to reduce power consumption. However, they require(More)
Power reduction is a critical requirement in modern VLSI design due to increasing operating frequencies and circuit densities, and the emergence of portable applications. Decreasing the supply voltage, VDD, is the easiest way to reduce power consumption in CMOS circuits because switching power is proportional to VDD for rail-to-rail logic swing. However,(More)
This paper introduces a 51.2Gops, 1.0GB/s-DMA single-chip multi-processor integrating quadruple cores and proposes a new power integrity analysis. Our multi-processor is designed to decode MP@HL streams without any dedicated circuits. To achieve such high performance, data throughput as well as processing capability is important, requiring a large number of(More)
Local conformation and overall conformation of poly(γ-DL-glutamic acid) (PγDLGA) and poly(γ-L-glutamic acid) (PγLGA) in aqueous solution was studied as a function of degree of ionization ε by (1) H-NMR, circular dichroism, and potentiometric titration. It was clarified that their local conformation is represented by random coil over an entire ε range and(More)