Aswin Sridharan

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A high performance and low power node architecture becomes crucial in the design of future generation supercomputers. In this paper, we present a generic set of cells for designing complex functional units that are capable of executing an algorithm of reasonable size. They are called Algorithm Level Functional Units (ALFUs) and a suitable VLSI design(More)
Future generation supercomputing clusters are endeavouring to achieve exascale performance without compromise on energy efficiency. Executing multiple applications simultaneously without space time sharing in a heterogeneous multi core environment brings out the utmost parallelism that exists within the applications. This helps to attain peak performance(More)
Current day processors utilize a complex and finely tuned system software to map applications across their cores and extract optimal performance. However with increasing core counts and the rise of heterogeneity among cores, tremendous stress will be exerted on the software stack leading to bottlenecks and underutilization of resources. We propose an(More)
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