Ashis Maity

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This paper presents a capacitor-less low drop-out (LDO) regulator with a slew-rate enhancement circuit. The proposed slew-rate enhancement circuit senses the transient voltage at the output of the LDO to increase the bias current of the error amplifier for a short duration. Hence, the transient response of the regulator is significantly improved due to the(More)
This work presents a dynamic width segmentation scheme of the power MOSFETs to improve the light load efficiency in high frequency DC-DC converters. The proposed scheme first senses the load current and decides the maximum number of power MOSFET segments to be turned ON. In order to sense the load current accurately over a wide range, an improved current(More)
A new technique has been proposed to improve the transient behavior of the on-chip/embedded voltage regulator. It is realized by introducing a dynamic leakage path at the driver stage of voltage regulator. The circuit is implemented in 0.18/spl mu/ CMOS technology and the voltage regulator generates 1.9V from 3.3V supply. The dynamic leaker consumes almost(More)
Pomegranate bacterial blight disease caused by Xanthomonas axonopodis pv. punicae is one of the most serious threat to the pomegranate industry in India. So far, the chemicals used to control this pathogen alone are less effective. In this article, an attempt was made to supplement chemical control through improving the systemic acquired resistance of plant(More)
In this paper, a modified hybrid-mode sense amplifier (SA) for low power SRAM applications is being proposed using CMOS 180 nm technology. In order to overcome the observed limitations of the conventional hybrid-mode SA in terms of the sensing delay, the data line (DL) split has been made faster by partially blocking the bit line (BL) discharge in the(More)
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