Ashay Narsale

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As device feature size continues to scale down to the nanometer regime, the decreasing critical charge fundamentally reduces noise margins of devices and in turn increases the susceptibility of the ICs to external noise sources such as particle strikes. While protection techniques for memory such as ECC are mature and effective, protections for logic errors(More)
tecture Laboratory in the university. His research interests include digital circuit design, computer architecture and circuit reliability. ii Acknowledgement It is my pleasure to thank the people who made this thesis possible. First of all, I would like to thank my advisor, Prof. Michael Huang who showed a lot of enthusiasm as well as patience with my(More)
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