Arno Kunzmann

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The scan design is the most widely used technique used to ensure the testability of sequential circuits. In this article it is shown that testability is still guaranteed, even if only a small part of the flipflops is integrated into a scan path. An algorithm is presented for selecting a minimal number of flipflops, which must be directly accessible. The(More)
This paper describes a new and highly efficient approach for weighted random pattern generation. In contrast to the state-of-the-art approaches, where input specific weights are computed, the proposed method is based on the computation of global weights. This set of a very few weights (e.g., 4 or 8) is pattern oriented and therefore, with each weight the(More)
This paper is focused on reducing the design time in a CAD framework environment by the optimal use of resources. A user-transparent load distribution system (Framework based LOad DIstribution System-FLODIS) is presented that enables a distributed execution of design tools over a heterogeneous network of workstations. The basic idea of the proposed(More)
One of the main tasks within the high-level synthesis (HLS) process is the verification problem to prove automatically the correctness of the synthesis results. Currently, the results are usually checked by simulation. In consequence, both the behavioral specification and the HLS results have to be simulated by the same set of test vectors. Due to the HLS(More)
The eficiency of pseudo-exhaustive test generation is strictly limited by the maximal number of inputs to be enumerated, since n inputs require a test length of 2n. In contrast to other approaches, the proposed self-test method also takes the fault model into account. In addition to the conventionally used structural circuit information, so-called "(More)
Due to the increasing complexity of CAD systems, project managers, engineers and designers have to be supported in handling an increasing number and variety of highly specialized tools. Recent research activities follow the goal, to integrate these tools in a unified framework, which enables concurrent engineering based on a controlled execution of design(More)