Armin Würtenberger

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Reducing test application time and test data volume are major challenges in SoC design. In the case of IP cores, where no structural information is available, a common strategy is to compress the test data TD provided by the core vendor into an encoded format TE. Only the smaller set TE is stored on the ATE, and during test the original test data TD are(More)
Store-and-generate techniques encode a given test set and regenerate the original test set during test with the help of a decoder. They are particularly suitable for IP cores coming with pre-computed test sets, and they also offer a natural option for test resource partitioning, because the encoded test data can be stored either on or off chip. Previous(More)
Store-and-generate techniques encode a given test set and regenerate the original test set during the test with the help of a decoder. Previous research has shown that run-length coding, particularly alternating run-length coding, can provide high compression ratios for the test data. However, experimental data show that longer runlengths are distributed(More)
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