In deep sub-micron technologies, increased standby leakage current in high performance processors results in increased junction temperature. Elevated junction temperature causes further increase on the standby leakage current. The standby leakage current is expected to increase even more under the burn-in environment leading to still higher junction… (More)
Burn-in faces significant challenges in recent CMOS technologies. The self-generated heat of each IC in a burn-in environment contributes to larger currents that can lead to further increase in junction temperatures, possible thermal run away, and yield-loss of good parts. Calculations show that the junction temperature is increasing by 1.45X/generation.… (More)
—This article describes how CMOS IC technology scaling impacts semiconductor burn-in and burn-in procedures. Burn-in is a quality improvement procedure challenged by the high leakage currents that are rapidly increasing with IC technology scaling. These currents are expected to increase even more under the new burn-in environments leading to higher junction… (More)
The effectiveness of single threshold I DDQ measurement for defect detection is eroded owing to higher and more variable background leakage current in modern VLSIs. Delta I DDQ is identified as one alternative for deep submicron current measurements. Often delta I DDQ is coupled with voltage and thermal stress in order to accelerate the failure mechanisms.… (More)
We investigate trade-offs in microprocessor frequency and system power achievable for low temperature operation in scaled high leakage technologies by combining refrigeration with supply voltage selection, body bias, transistor sizing and shorter channel length. Reducing channel length provides better frequency and power improvement than forward body bias.… (More)
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