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Quantum-dot Cellular Automata (QCA) technology is attractive due to its low power consumption, fast speed and small dimension; therefore it is a promising alternative to CMOS technology. Additionally, multiplexer is a useful part in many important circuits. In this paper we propose a novel design of 2:1 MUX in QCA. Moreover, a 4:1 multiplexer, an XOR gate(More)
Quantum Cellular Automata (QCA) is an emerging nanotechnology and one of the top six technologies of the future. CMOS technology has a lot of limitations while scaling into a nano-level. QCA technology is a perfect replacement of CMOS technology with no such limitations. In this paper we have proposed one 2:1 multiplexer circuit having lowest complexity and(More)
Spin-Transfer Torque Random Access Memory (STT-RAM) have been researched as a promising alternative for SRAM in reconfigurable fabrics, especially in Look-Up Tables (LUTs), due to its non-volatility, low standby and static power, and high integration density features. In this paper, we leverage physical characteristics of Magnetic Tunnel Junctions (MTJs) to(More)
Although the trend of technology scaling is sought to realize higher performance computer systems, it also results in Integrated Circuits (ICs) suffering from increasing Process, Voltage, and Temperature (PVT) variations and adverse aging effects. In most cases, these reliability threats manifest themselves as timing errors on critical speed-paths of the(More)
Nanotechnologies, notably Quantum-dot Cellular Automata (QCA), provide an attractive perspective for future computing technologies. In this paper, Quantum-dot Cellular Automata (QCA) is investigated as an implementation method for reversible logic. A novel XOR gate and also a new approach to implement 2:1 multiplexer are presented. Moreover, an efficient(More)
Quantum-dot Cellular Automata (QCA) seek potential benefits over CMOS devices such as low power consumption, small dimensions, and high speed operation. Two prominent QCA concerns of wire crossing complexity and circuit robustness are addressed by developing a three-step Bilayer Logic Decomposition (BLD) methodology to design QCA-based logic circuits. The(More)
As the number of on-chip processor cores increases, power-efficient solutions are sought for data communication between cores. TheHelix-h non-blocking photonic switch is developed to improve physical-layer and network performance parameters for a wide range of silicon nano-photonic multicore interconnection topologies. Traffic benchmarks and practical case(More)