Aravind Rajendran

Learn More
Aggressive technology scaling has resulted in stability reduction for classic SRAM designs. This is especially problematic for large integrated circuits. The stability of SRAM cells can be affected by noise during a read operation and by radiation during the standby mode. In this paper, we present an approach to address the gradual stability reduction in(More)
This paper presents a novel SRAM design for nanoscale CMOS. The new design addresses the problem of low radiation tolerance and high instability for SRAM memories at feature size of 32nm. The novelty of our approach originates from the synergetic functional component separation, where each component serves its unique operational function and has minimal(More)
  • 1