Arash Ahmadi

Learn More
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical algorithms always results in an optimization problem of trading computational error with implementation costs. In this study, a symbolic noise analysis method is introduced for(More)
This work is concerned with Carbon Nanotube diameter variations and the resulting uncertainties on the behavior of logic gates made from Single Walled Carbon Nanotubes (SWCNTs). Monte Carlo simulations were performed for logic gates based on CNTs of different mean diameters using the Stanford CNFET model. Delay characteristics of logic gates (NOT, NAND,(More)
there has been a strong push recently to examine biological scale simulations of neuromorphic algorithms to achieve stronger inference capabilities. This paper presents a set of piecewise linear spiking neuron models, which can reproduce different behaviors, similar to the biological neuron, both for a single neuron as well as a network of neurons. The(More)
High-accuracy implementation of biological neural networks is a computationally expensive task, specially, for large-scale simulations of neuromorphic algorithms. This paper proposes a set of models for biological spiking neurons, which are efficiently implementable on digital platforms. Proposed models can reproduce different biological behaviors with a(More)
Recently memristor-based applications and circuits are receiving an increased attention. Furthermore, memristors are also applied in logic circuit design. Material implication logic is one of the main areas with memristors. In this paper an optimized memristor-based full adder design by material implication logic is presented. This design needs 27(More)
In this paper we study the effects of Single Walled Carbon Nanotube (SWCNT) diameter variations on performance and stability of 6-T SRAM cells. Parametric and Monte Carlo simulations are performed for SRAM designs based on different SWCNT mean diameters. Parameters such as read/write delays, Static Noise Margin (SNM) and Write Margin (WM) are studied(More)
This study presents an analog implementation of the spiking neurons based on a piecewise-linear model. This model is a variation of the Izhikevich model, which is capable of reproducing different dynamic behaviors. The proposed circuit utilizes second generation current conveyors (CCII) building blocks. With the same topology and circuit values, this(More)
Memristor as an emerging history dependent nanometer scaled element will play an important role in future nanoelectronic computing technologies. Some pure and hybrid memristor-based implementation techniques have been proposed in recent years. Material implication logic is one of the significant areas for memristor-based logic implementation. In this paper(More)
In this paper, a new VLSI implementable Hopf oscillator with dynamic plasticity is proposed for next-generation portable signal processing application. A circuit-realizable piece-wise linear function has been used to govern the frequency adaptation characteristic of the proposed oscillator. Furthermore, a straightforward method is suggested to extract the(More)
This paper presents a modified astrocyte model that allows a convenient digital implementation. This model is aimed at reproducing relevant biological astrocyte behaviors, which provide appropriate feedback control in regulating neuronal activities in the central nervous system. Accordingly, we investigate the feasibility of a digital implementation for a(More)