Anuja Jayraj Thakkar

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Space applications rely increasingly on high data rate DSP algorithms. These algorithms use double precision floating point arithmetic operations. While most DSP applications can be compiled on DSP processors, high data rate DSP computations require novel implementation technologies to support their high throughputs. Only recently, gate densities in FPGAs(More)
In this paper, experiments are conducted in order to quantitatively evaluate the tradeoffs between design complexity and area overhead, reconfiguration flexibility, and reconfiguration latency of two reconfiguration interfaces, i.e. SelectMAP and JTAG. The results show that the SelectMAP interface is highly suitable when reconfiguration latency needs to be(More)
Two different interfaces, namely the JTAG and SelectMAP interfaces, have been proposed for controlling and managing partial reconfiguration of SRAM-based Field Programmable Gate Arrays (FGPAs). Each of these interfaces provides distinct advantages in terms of area overhead and reconfiguration latency. In this paper, two corresponding sets of Application(More)
Floating point arithmetic is widely used in many areas, especially scientific computation and signal processing. For many signal processing, and graphics applications, it is acceptable to trade off some accuracy (in the least significant bit positions) for faster and better implementations. Division is the third basic operation of arithmetic. However, most(More)
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