Antonis Psathakis

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This paper studies alternative Network-on-Chip architectures for emerging many-core chip multiprocessors, by exploring the following design options on mesh-based networks: Multiple physical networks (P), cores concentration (C), express channels (X), flit widths (W), and virtual channels (V). We exhaustively evaluate all combinations of the aforementioned(More)
Networks-on-chip are integral parts of modern chips and designers explore the architectural design space to optimize both performance and energy-efficiency. Architectural choices for modern NoCs include: (i) partitioning using multiple sub-networks (P), (ii) concentration (C), and (iii) express physical links (X). Previous efforts do not adequately cover(More)
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