Antoine Trouvé

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In this paper we propose and evaluate our platform to accelerate applications using custom instruction set extensions. We use a dynamically reconfigurable functional unit (DRFU) to execute the application specific custom instructions generated by our compiler framework. We explore two architectures with different computational granularities for the DRFU(More)
We introduce MAD7, a tool that rapidly simulates many-core memory architectures at a functional level. MAD7 focuses on tracking access patterns and data spatial localities rather than enforcing any precise on-chip arbitration protocols. Although not cycle accurate by nature, it provides useful insights when comparing different memory architectures under(More)
This paper introduces PASTIS, a novel photonic arbitration protocol based on a scalable token injection scheme, and ring-based nanophotonic technology. It aims at connecting together processors and memories in many-core computer systems by means of a ring topology. The main strength of PASTIS lays in the fact that it uses photonic components exclusively,(More)
In this paper, we address the hardware overhead of the dynamically reconfigurable functional unit (DRFU) in dynamically reconfigurable processors (DRP), in the context of low-power, embedded system-on-chips (E-SoC). We consider a tightly coupled DRP with a small, coarse-grain DRFU made of four columns of four ALUs. These are interconnected following one of(More)