Annie Pérez

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Nowadays hi-tech secure products offer more services and more security. The corresponding market is now oriented towards more flexibility. As an answer we propose here a multi-algorithm cryptographic co-processor called Celator. A main processor entrusts to the Celator the cryptographic tasks like encrypting or decrypting data blocks using secret key(More)
We present an IP-core called PHCA for programmable hardware cellular automaton (CA). PHCA is a hardware implementation of a general purpose cellular automaton entirely programmable. The heart of this structure is a PE array with reconfigurable side links allowing to implement a 2-D CA or a 1-D CA. As an illustration of a PHCA program we present the(More)
The purpose of this paper is to present an automated design methodology for charge pump circuits. This method focuses on charge pump design parameters automatic generation according to specific design constraints like maximum output voltage, minimal consumption current or maximal power efficiency. This method is based on a charge pump mathematical model.(More)
In this paper a charge pump model based on a DOE (design of experiment) model generation technique is presented. The DOE technique takes as input electrical simulation results of a charge pump circuit for different component geometries and different oscillator pulse periods. It produces, as outputs, polynomial equations of the charge pump output voltage HV(More)
A multi-algorithm Crypto-Co-Processor called Celator is presented. Celator architecture is based on a 4times4 Processing Elements systolic array, a Sequencer with a Finite State Machine (FSM) and a local memory, the Celator RAM (CRAM). Data are encrypted or decrypted by the PE array. The whole system architecture around Celator includes a Central Processing(More)
This paper presents a CRYPTO-MEMORY based on Advanced Encryption Standard (AES) algorithm and SRAM architecture. The design of a dual-port SRAM has been modified by the addition of all logic operators required by the hardware implementation of AES. Moreover, a Finite State Machine has been included in order to allow a self-encryption in full autonomy.(More)
In this paper, design parameters of a current reference circuit are automatically generated according to specific design constraints. These constraints can be minimal consumption current or minimal temperature coefficients. This methodology is based on a current reference mathematical model. This model is generated thanks to a dasiaDesign Of Experimentpsila(More)
Embedded DRAM technology is undergoing a radical evolution. With size reduction, capacity shrink seems to be a complex obstacle to overcome. Alternative memory cells have been proposed to respond to this problem; capacitorless eDRAM is one of most promising solution. In this paper, after reviewing the current status on eDRAM market and recent evolution of(More)