Anis Boudabous

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This work presents an efficient fast parallel architecture of the Vector Median Filter (VMF) using combined hardware/software (HW/SW) implementation. The hardware part of the system is implemented using VHDL language, whereas the software part is developed using C/C++ language. The software part of the embedded system uses the NIOS-II softcore processor and(More)
In this paper, we propose a low-cost sequential architecture for the implementation of CORDIC algorithm in two computation modes. It suited for serial operation that performs conversion between polar and rectangular coordinate systems, essentially sin/cos, sinh/cosh and arctan computation. The design targets real time application of fingerprint recognition.(More)
A new code sign implementation of vector median rational hybrid filter based on efficient hardware/software implementation is introduced and applied to colour image filtering problems. This filter is used essentially to remove impulsive and Gaussian noise in colour images. In our design we start by implementing the software solution in system on(More)
This paper proposes a novel digital signal processing implementation of vector directional distance rational hybrid filter for impulsive, Gaussian and mixed noise suppression and fine-details preservation in color images. The Implementation was done, initially, based on digital signal processing , which proves the need to a large execution time for(More)
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