Aniket Datta

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We present a self-repairing SRAM to reduce parametric failures using an on-chip leakage sensor and application of proper body bias. Simulations in a predictive 70nm technology show 5-40% (depending on inter-die Vt variation) improvement in SRAM yield. A test-chip is fabricated and measured in 0.13 mum CMOS to demonstrate operation of the self-repair system
Insulated gate bipolar transistors (IGBTs) are used in high-power voltage-source converters rated up to hundreds of kilowatts or even a few megawatts. Knowledge of device switching characteristics is required for reliable design and operation of the converters. Switching characteristics are studied widely at high current levels, and corresponding data are(More)
Programming performance of dual-bit silicon-oxide-nitride-oxide-silicon memories is studied on cells fabricated using different channel engineering schemes. Both halo and compensation implants are shown to impact the programming speed, bit coupling, and read disturb, and can be suitably adjusted to optimize the cell operation. The doping dependence of bit(More)
Dead-time is introduced between the gating signals to the top and bottom switches in a voltage source inverter (VSI) leg, to prevent shoot through fault due to the finite turn-off times of IGBTs. The dead-time results in a delay when the incoming device is an IGBT, resulting in error voltage pulses in the inverter output voltage. This paper presents the(More)
This paper presents the experimental results for an attractive control scheme implementation using an 8 bit microcontroller. The power converter involved is a 3 phase full controlled bridge rectifier. A single quadrant DC drive has been realized and results have been presented for both open and closed loop implementations.
A dual-node split-gate silicon-oxide-nitride-oxide-silicon cell with a novel read scheme is proposed for 2-bit/cell operation. Using suitable gate screening bias in reverse read, bit coupling can be reduced, even when low read <i>V</i> <sub>D</sub> is used to keep read disturb under control. The proposed read scheme maintains the memory window for(More)
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