Learn More
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of both the topology and the component values for analog circuits comprising of R, L and C elements, from a given set of specifications. The novelty of the work pertains to two(More)
This paper introduces a graph grammar based approach to automated topology synthesis of analog circuits. A grammar is developed to generate circuits through production rules, that are encoded in the form of a derivation tree. The synthesis has been sped up by using dynamically obtained design-suitable building blocks. Our technique has certain advantages(More)
This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topology generation. A new kind of GA is developed, where a fraction of the offsprings in each generation is built from building blocks or cells obtained from previous generations. The(More)
— This paper presents ATLAS-a framework for automated analog circuit synthesis that comprises of both topology generation and subsequent circuit sizing. A hierarchically arranged building block or cell library is used in this regard. The adaptively formed library starts only with basic elements and gradually includes functionally useful and bigger blocks,(More)
Topology design of computer networks is a constrained optimization problem for which exact solution approaches do not scale well. This paper introduces a self-learning, non-greedy optimization technique for network topology design. It generates new solutions based on the merit of the preceding ones. This is achieved by maintaining a solution library for all(More)
Scalability has been an important issue in mobile ad-hoc network (MANET). Clustering is one of the mechanisms that are used in handling the scalability issue. Many cluster formation and cluster maintenance algorithms have been proposed for MANET. This paper presents the hardware implementation and study of some of the proposed cluster formation algorithms(More)
— This paper introduces a fuzzy logic based guidance architecture to a graph grammar framework for automated design of analog circuits. The grammar generates circuit topologies through a derivation tree. To boost this tree based synthesis mechanism, smaller building blocks in the form of subtrees have been used for the purpose. These blocks have been(More)
  • 1