Andrei Vladimirescu

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Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (V DD) to its limit, which is the Data Retention Voltage (DRV), leakage power can be substantially reduced. This paper explores how low DRV can be in a standard low leakage SRAM module and analyzes how DRV is affected by parameters such as(More)
Between July and October 1996, a West Nile (WN) fever epidemic occurred in the southern plain and Danube Valley of Romania and in the capital city of Bucharest, resulting in hundreds of neurologic cases and 17 fatalities. In early October 1996, entomologic and avian investigations of the epidemic were conducted in the city of Bucharest and nearby rural(More)
94720 Acknowledgements Many people have contributed to the development of SPICE over the years. The work of and others too numerous to name under the direction of Professor Donald Pederson provided a very solid base from which to more forward. The research described in t h i s dissertation would not have been possible without the environment for research(More)
– As circuit parametric variations aggravate in advanced technology, yield emerges as an important figure-of-merit in circuit design. Based on a 130nm technology, the yield-energy-delay tradeoffs in low-power circuit optimization are investigated. Using a log-normal statistical model, Monte-Carlo analyses are performed on typical circuit examples, including(More)
—Planar fully-depleted SOI technology is becoming mainstream within STMicroelectronics, targeting modern mobile and consumer multimedia markets. This technology combines high performance and low power consumption, complemented by an excellent responsiveness to power management design techniques. The fabrication process is comparatively simple and is a(More)
Suppressing the leakage current in memories is critical in low-power design. By reducing the standby supply voltage (V DD) to its limit, which is the data retention voltage (DRV), leakage power can be substantially reduced. This paper models the DRV of a standard low leakage SRAM module as a function of process and design parameters, and analyzes the SRAM(More)
Many people contributed t o develop the new input and model equations for MOSFET's. The contincing encouragement and support of our research advisor, Professor D. 0. Pederson, is greatly appreciated. Steady discussions with E. Cohen and other members of the UC Berkeley Integrated Circuits Computer-Aided Design Group are acknowledged. Discussions with Profs.(More)