Andreas Weichslgartner

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Future many-core systems are envisaged to support the concurrent execution of varying mixes of different applications. Because of the vast number of binding options for such mixes on heterogeneous resources, enabling predictable application execution is far from trivial. Hybrid application mapping is an efficient way of achieving run-time predictability by(More)
This paper presents a novel application-driven and resource-aware mapping methodology for tree-structured streaming applications onto NoCs. This includes strategies for mapping the source of streaming applications (seed point selection), as well as embedding strategies so that each process autonomously embeds its own succeeding tasks. The proposed embedding(More)
Networks-on-Chip (NoC) enable scalability for future manycore architectures, facilitating parallel communication between multiple cores. Applications running in parallel on a NoC-based architecture can affect each other due to overlapping communication. Quality-of-Service (QoS) must be supported by the communication infrastructure to execute communication-,(More)
Networks-on-Chip have shown their scalability for future many-core systems on chip. In real world scenarios, concurrent applications with different QoS requirements affect each other through overlapping communication. Therefore computation resources may not be efficiently utilized because the required communication resources are already occupied. Hence, an(More)
Many-core systems provide a feasible means to build high-performance multi-application systems. They are increasingly exposed to dynamic changes due to varying and online modified application mixes, as well as unavailability of hardware resources due to thermal and power management or faults. Particularly, when applications with real-time requirements are(More)
Improving Efficiency of Embedded Multi-core Platforms with Scratchpad Memories Johny Paul, Walter Stechele, Manfred Kröhnert, and Tamim Asfour 12:00 – 12:30 Position Paper & Discussion: Towards Actor-oriented Programming on PGAS-based Multicore Architectures Sascha Roloff, Frank Hannig, and Jürgen Teich 12:30 – 13:30 Lunch Break 13:30 – 14:30(More)
In this paper, we present an FPGA-based smart camera system with support for dynamic run-time reconfiguration. The underlying architecture consists of a static SoC which can be extended by dynamic modules. These modules are responsible for the stream-based image processing and can be loaded and unloaded at run-time. Furthermore, even the position of these(More)