Andreas Wasserbauer

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In the modern verification environment an FPGA-based prototyping has become an important part of the whole verification flow. The ability to simulate real time application in more realistic speeds allows much higher coverage than traditional HDL logic simulators. The main disadvantage of FPGA prototyping is inability to inspect and observe internal FPGA(More)
In the modern verification environment the FPGA-based prototyping has become an important part of the whole verification flow. The ability to simulate real time application in the more realistic speeds allows much higher coverage than traditional HDL logic simulators. The main disadvantage of FPGA prototyping is inability to inspect and observe internal(More)
In this paper we present a computationally inexpensive way to perform Occlusion Culling in terrain scenes, modelled by elevation maps. The proposed method is based on virtual Occluders [Law99] (i.e. relatively simple structures, that are used to perform the actual visibility test). Unlike most of the related work, we did not seek for an accurate solution,(More)
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