Andreas Riefert

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The shrinking nanometer technologies of modern microprocessors and the aggressive supply voltage down-scaling drastically increase the risk of soft errors. In order to tackle this problem, we propose an FPGA-based fault injection framework which is able to identify the most critical parts of a system running in its native environment. Experimental results(More)
Functional microprocessor test methods provide several advantages compared to DFT approaches, like reduced chip cost and at-speed execution. However, the automatic generation of functional test patterns is an open issue. In this work we present an approach for the automatic generation of functional microprocessor test sequences for small-delay faults based(More)
Software-based self-test (SBST) techniques are used to test processors against permanent faults introduced by the manufacturing process (often as a complementary approach with respect to DfT) or to perform in-field test in safety-critical applications. A major obstacle to their adoption is the high cost for developing effective test programs, since there is(More)
The development of fault-tolerant autonomous robots for long-term deployment has been an area of active research for decades. Many researchers have focused on the tolerance to failures of sensors and actuators of various types of robots. In contrast to these failures, robots encounter transient faults on all levels including the bit level of microprocessors(More)
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