Andreas Hansson

Learn More
Reactive oxygen species (ROS) and reactive nitrogen species (RNS) are produced in many places in living cells and at an increased rate during biotic or abiotic stress. ROS and RNS participate in signal transduction, but also modify cellular components and cause damage. We first look at the most common ROS and their properties. We then consider the ways in(More)
The goals for the Æthereal network on silicon, as it was then called, were set in 2000 and its concepts were defined early 2001. Ten years on, what has been achieved? Did we meet the goals, and what is left of the concepts? In this paper we answer those questions, and evaluate different implementations, based on a new performance: cost analysis. We(More)
One of the key steps in <i>Network-on-Chip</i> (NoC) based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problem first map cores onto a topology and then route communication, using separated and possibly conflicting objective functions. In this paper we present a unified(More)
A growing number of applications, often with firm or soft real-time requirements, are integrated on the same System on Chip, in the form of either hardware or software intellectual property. The applications are started and stopped at run time, creating different use-cases. Resources, such as interconnects and memories, are shared between different(More)
The chloroplast-localized NADPH-dependent thioredoxin reductase (NTRC) has been found to be able to reduce hydrogen peroxide scavenging 2-Cys peroxiredoxins. We show that the Arabidopsis ntrc mutant is perturbed in chlorophyll biosynthesis and accumulate intermediates preceding protochlorophyllide formation. A specific involvement of NTRC during(More)
ion, and flexible network configuration,” IEEE Trans-<lb>actions on Computer-Aided Design of Integrated Circuits and<lb>Systems, vol. 24, no. 1, pp. 4–17, 2005.<lb>[4] M. Sgroi, M. Sheets, A. Mihal, et al., “Addressing the system-<lb>on-a-chip interconnect woes through communication-based<lb>design,” in Proceedings of the 38th Design Automation(More)
Dynamic Voltage and Frequency Scaling (DVFS) is an essential part of controlling the power consumption of any computer system, ranging from mobile phones to servers. DVFS efficiency relies on hardware-software co-optimization, thus using existing hardware cannot reveal the full optimization potential beyond the current implementation's characteristics. To(More)
Systems on chip (SoC) are becoming increasingly complex, with a large number of applications integrated on the same chip. Such a system often supports a large number of usecases and is dynamically reconfigured when platform conditions or user requirements change. Networks on Chip (NoC) offer the designer unsurpassed runtime flexibility. This flexibility(More)
One of the key steps in Network-on-Chip-based design is spatial mapping of cores and routing of the communication between those cores. Known solutions to the mapping and routing problems first map cores onto a topology and then route communication, using separate and possibly conflicting objective functions. In this paper, we present a unified(More)
To accommodate the growing number of applications integrated on a single chip, Networks on Chip (NoC) must offer scalability not only on the architectural, but also on the physical and functional level. In addition, real-time applications require Guaranteed Services (GS), with latency and throughput bounds. Traditionally, NoC architectures only deliver(More)