Andrea Mineo

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Several emerging techniques have been recently proposed for alleviating the communication latency and the energy consumption issues in multi/many-core architectures. One of such emerging communication techniques, namely, WiNoC replaces the traditional wired links with the use of wireless medium. Unfortunately, the energy consumed by the RF transceiver(More)
In a wireless Network-on-Chip (WiNoC) the radio transceiver accounts for a significant fraction of the total communication energy. Recently, a configurable transceiver architecture able to regulate its transmitting power based on the location of the destination node has been proposed. Unfortunately, the use of such transceiver requires a costly, time(More)
The power dissipated by the links of a network-on-chip (NoC) accounts for a significant fraction of the overall power dissipated by the on-chip communication fabric. Such fraction becomes more relevant as technology shrinks. This paper presents a technique aimed at reducing the energy consumption of the NoC by means of link voltage swing reduction. The(More)
The energy consumed by the links of a Network-on-Chip (NoC) accounts for a significant fraction of the overall energy budget in a multi/many-core system. Reducing voltage of the links allows to save energy but at the cost of an increase of the bit error rate (BER). Since different communications might have different reliability (i.e., BER) requirements, in(More)
In a multi/many-core system, the network-on-chip (NoC)-based communication backbone is responsible for a relevant fraction of the overall energy budget. Reducing the voltage swing for signaling in crossbars and links results in significant energy saving. Unfortunately, as voltage swing reduces, the bit error rate increases, that in turn compromises the(More)
The on-chip communication in current Chip-MultiProcessors (CMP) and MultiProcessor-SoC (MPSoC) is mainly based on the Network-on-Chip (NoC) design paradigm. Unfortunately, it is foreseen that conventional NoC architectures cannot sustain the performance, power, and reliability requirements demanded by the next generation of manycore architectures. Recently,(More)
The emergent wireless Network-on-Chip (WiNoC) design paradigm has been proposed as a viable solution for addressing the scalability issues affecting the on-chip communication system in future manycores architectures. Within this scenario, the energy contribution of the buffers (both of the routers and radio-hubs) and the transceivers of the radio-hubs,(More)