Amol J. Mupid

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This paper describes an efficient methodology for testing dedicated clock lines in Field Programmable Gate Arrays (FPGAs). A H-tree based clocking architecture is proposed along with a test scheme. The H-tree architecture provides optimal clock skew characteristics. The H-tree architecture consumes at least 25% less of the routing resources when compared to(More)
This paper describes a novel method for online detection and location of interconnects faults in SRAM-based FPGA systems. In safety critical systems like space probes, online checkers are used to report misbehavior of any of the subcircuit within the system. When one such subcircuit is reported to misbehave, the algorithm proposed in this paper attempts to(More)
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