Ammar Karkar

Learn More
Network-on-chip (NoC) is a communication paradigm that has emerged to tackle different on-chip challenges and has satisfied different demands in terms of high performance and economical interconnect implementation. However, merely metal based NoC pursuit offers limited scalability with the relentless technology scaling, especially in one-to-many (1-to-M)(More)
Network-on-chip (NoC) is a communication paradigm that has emerged to tackle different on-chip challenges and satisfy different demands in terms of high performance and economical interconnect implementation. However, merely metal based interconnect pursuit offers limited scalability with the relentless technology scaling. To meet the scalability demand,(More)
Network-on-chip (NoC) has emerged to tackle different on-chip challenges and has satisfied different demands in terms of high performance, economical and reliable interconnect implementation. However, a merely metal-based interconnect reaches performance bound with the relentless technology scaling. Especially, it displayed a bottleneck to meet the(More)
Network-on-Chip (NoC) design is attracting more and more attention nowadays, but there is a lack of design optimization method due to the computationally very expensive simulations of NoC. To address this problem, an algorithm, called NoC design optimization based on Gaussian process model assisted differential evolution (NDPAD), is presented. Using the(More)
Networks-on-chip (NoC) has been proven to satisfy different on-chip communication requirements in terms of costs, performance, and reliabilities. This has been proven true especially for spiking neural network (SNN) with its high multicast communication demands. However, metal-wires that form the foundation for regular NoCs face a set of challenges since(More)
  • 1