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Anti-random testing has proved useful in a series of empirical evaluations. The basic premise of anti-random testing is to chose new test vectors that are as far away from existing test inputs as possible. The distance measure is Ham-ming or Cartesian Distance. Unfortunately, this method essentially requires enumeration of the input space and computation of(More)
A CMOS timing analyser using accurate delay models is presented. Switch-level analytic delays are derived from (I/V) characteristics of short-channel Mosfets. A significant improvement in accuracy is obtained from the analysis of pertinent capacitances, modeling conflicts and slope effects in CMOS gates. The program handles large-scale circuits and gives(More)
When designing a system in the behavioral level, one of the most important steps to be taken is verifying its func-tionality before it is released to the logic/PD design phase. One may consider behavioral models as oracles in industries to test against when the final chip is produced. In this work, we use branch coverage as a measure for the quality of(More)
This paper proposes criteria for the verification of be-havioral designs for hardware written in VHDL. The criteria are analogous to testing criteria for software, but were adapted to the specific needs and constructs of hardware designs written in VHDL. We examine the potential value of these criteria with respect to desirable properties for evaluation(More)
Testing behavioral models before they are released to the synthesis and logic design phase is a tedious process, to say the least. A common practice is the test-it-to-death approach in which millions or even billions of vectors are applied and the results are checked for possible bugs. The vectors applied to behavioral models include functional vectors, but(More)
In order to improve the efficiency of behavioral model verification, it is important to determine the points of dem-inishing return for a given verification strategy. This paper compares the existing stopping rules and presents a new stopping rule based on static Bayesian technique. The new stopping rule was applied to verifying 14 complex VHDL models. We(More)
During behavioral model verification, it is important to determine the stopping point for the current test strategy and for moving to a different test strategy. It has been shown that the location of the stopping point is highly dependent on the statistical model one should choose to describe the coverage behavior during the verification process. This paper(More)